Commit cfeca264b4a5bbfdcfe7e2d4ddba9093b88e75f1
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27b90ded
address check in single register / coil responses added (#463)
Address check in single register / coil responses added According to Modbus standard the address of single register / coils request and response must match Co-authored-by: Heinrich Gsponer <heinrich.gsponer@siemens.com>
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22 additions
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2 deletions
src/modbus.c
| @@ -555,6 +555,8 @@ static int check_confirmation(modbus_t *ctx, uint8_t *req, | @@ -555,6 +555,8 @@ static int check_confirmation(modbus_t *ctx, uint8_t *req, | ||
| 555 | function < 0x80) { | 555 | function < 0x80) { |
| 556 | int req_nb_value; | 556 | int req_nb_value; |
| 557 | int rsp_nb_value; | 557 | int rsp_nb_value; |
| 558 | + int resp_addr_ok = TRUE; | ||
| 559 | + int resp_data_ok = TRUE; | ||
| 558 | 560 | ||
| 559 | /* Check function code */ | 561 | /* Check function code */ |
| 560 | if (function != req[offset]) { | 562 | if (function != req[offset]) { |
| @@ -591,6 +593,10 @@ static int check_confirmation(modbus_t *ctx, uint8_t *req, | @@ -591,6 +593,10 @@ static int check_confirmation(modbus_t *ctx, uint8_t *req, | ||
| 591 | break; | 593 | break; |
| 592 | case MODBUS_FC_WRITE_MULTIPLE_COILS: | 594 | case MODBUS_FC_WRITE_MULTIPLE_COILS: |
| 593 | case MODBUS_FC_WRITE_MULTIPLE_REGISTERS: | 595 | case MODBUS_FC_WRITE_MULTIPLE_REGISTERS: |
| 596 | + /* address in request and response must be equal */ | ||
| 597 | + if ((req[offset + 1] != rsp[offset + 1]) || (req[offset + 2] != rsp[offset + 2])) { | ||
| 598 | + resp_addr_ok = FALSE; | ||
| 599 | + } | ||
| 594 | /* N Write functions */ | 600 | /* N Write functions */ |
| 595 | req_nb_value = (req[offset + 3] << 8) + req[offset + 4]; | 601 | req_nb_value = (req[offset + 3] << 8) + req[offset + 4]; |
| 596 | rsp_nb_value = (rsp[offset + 3] << 8) | rsp[offset + 4]; | 602 | rsp_nb_value = (rsp[offset + 3] << 8) | rsp[offset + 4]; |
| @@ -599,17 +605,31 @@ static int check_confirmation(modbus_t *ctx, uint8_t *req, | @@ -599,17 +605,31 @@ static int check_confirmation(modbus_t *ctx, uint8_t *req, | ||
| 599 | /* Report slave ID (bytes received) */ | 605 | /* Report slave ID (bytes received) */ |
| 600 | req_nb_value = rsp_nb_value = rsp[offset + 1]; | 606 | req_nb_value = rsp_nb_value = rsp[offset + 1]; |
| 601 | break; | 607 | break; |
| 608 | + case MODBUS_FC_WRITE_SINGLE_COIL: | ||
| 609 | + case MODBUS_FC_WRITE_SINGLE_REGISTER: | ||
| 610 | + /* address in request and response must be equal */ | ||
| 611 | + if ((req[offset + 1] != rsp[offset + 1]) || (req[offset + 2] != rsp[offset + 2])) { | ||
| 612 | + resp_addr_ok = FALSE; | ||
| 613 | + } | ||
| 614 | + /* data in request and response must be equal */ | ||
| 615 | + if ((req[offset + 3] != rsp[offset + 3]) || (req[offset + 4] != rsp[offset + 4])) { | ||
| 616 | + resp_data_ok = FALSE; | ||
| 617 | + } | ||
| 618 | + /* 1 Write functions & others */ | ||
| 619 | + req_nb_value = rsp_nb_value = 1; | ||
| 620 | + break; | ||
| 602 | default: | 621 | default: |
| 603 | /* 1 Write functions & others */ | 622 | /* 1 Write functions & others */ |
| 604 | req_nb_value = rsp_nb_value = 1; | 623 | req_nb_value = rsp_nb_value = 1; |
| 624 | + break; | ||
| 605 | } | 625 | } |
| 606 | 626 | ||
| 607 | - if (req_nb_value == rsp_nb_value) { | 627 | + if ((req_nb_value == rsp_nb_value) && (resp_addr_ok == TRUE) && (resp_data_ok == TRUE)) { |
| 608 | rc = rsp_nb_value; | 628 | rc = rsp_nb_value; |
| 609 | } else { | 629 | } else { |
| 610 | if (ctx->debug) { | 630 | if (ctx->debug) { |
| 611 | fprintf(stderr, | 631 | fprintf(stderr, |
| 612 | - "Quantity not corresponding to the request (%d != %d)\n", | 632 | + "Received data not corresponding to the request (%d != %d)\n", |
| 613 | rsp_nb_value, req_nb_value); | 633 | rsp_nb_value, req_nb_value); |
| 614 | } | 634 | } |
| 615 | 635 |