Commit 9c809805f940b82ad991d336f7623ecac6dd3576
1 parent
6d9b069d
Prefix hexadecimal values with 0x to avoid confusion
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2 changed files
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12 additions
and
12 deletions
src/modbus-rtu.c
| ... | ... | @@ -389,7 +389,7 @@ static int _modbus_rtu_check_integrity(modbus_t *ctx, uint8_t *msg, |
| 389 | 389 | return msg_length; |
| 390 | 390 | } else { |
| 391 | 391 | if (ctx->debug) { |
| 392 | - fprintf(stderr, "ERROR CRC received %0X != CRC calculated %0X\n", | |
| 392 | + fprintf(stderr, "ERROR CRC received 0x%0X != CRC calculated 0x%0X\n", | |
| 393 | 393 | crc_received, crc_calculated); |
| 394 | 394 | } |
| 395 | 395 | ... | ... |
src/modbus.c
| ... | ... | @@ -725,7 +725,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 725 | 725 | MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE, rsp); |
| 726 | 726 | } else if ((address + nb) > mb_mapping->nb_bits) { |
| 727 | 727 | if (ctx->debug) { |
| 728 | - fprintf(stderr, "Illegal data address %0X in read_bits\n", | |
| 728 | + fprintf(stderr, "Illegal data address 0x%0X in read_bits\n", | |
| 729 | 729 | address + nb); |
| 730 | 730 | } |
| 731 | 731 | rsp_length = response_exception( |
| ... | ... | @@ -758,7 +758,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 758 | 758 | MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE, rsp); |
| 759 | 759 | } else if ((address + nb) > mb_mapping->nb_input_bits) { |
| 760 | 760 | if (ctx->debug) { |
| 761 | - fprintf(stderr, "Illegal data address %0X in read_input_bits\n", | |
| 761 | + fprintf(stderr, "Illegal data address 0x%0X in read_input_bits\n", | |
| 762 | 762 | address + nb); |
| 763 | 763 | } |
| 764 | 764 | rsp_length = response_exception( |
| ... | ... | @@ -789,7 +789,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 789 | 789 | MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE, rsp); |
| 790 | 790 | } else if ((address + nb) > mb_mapping->nb_registers) { |
| 791 | 791 | if (ctx->debug) { |
| 792 | - fprintf(stderr, "Illegal data address %0X in read_registers\n", | |
| 792 | + fprintf(stderr, "Illegal data address 0x%0X in read_registers\n", | |
| 793 | 793 | address + nb); |
| 794 | 794 | } |
| 795 | 795 | rsp_length = response_exception( |
| ... | ... | @@ -825,7 +825,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 825 | 825 | MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE, rsp); |
| 826 | 826 | } else if ((address + nb) > mb_mapping->nb_input_registers) { |
| 827 | 827 | if (ctx->debug) { |
| 828 | - fprintf(stderr, "Illegal data address %0X in read_input_registers\n", | |
| 828 | + fprintf(stderr, "Illegal data address 0x%0X in read_input_registers\n", | |
| 829 | 829 | address + nb); |
| 830 | 830 | } |
| 831 | 831 | rsp_length = response_exception( |
| ... | ... | @@ -847,7 +847,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 847 | 847 | if (address >= mb_mapping->nb_bits) { |
| 848 | 848 | if (ctx->debug) { |
| 849 | 849 | fprintf(stderr, |
| 850 | - "Illegal data address %0X in write_bit\n", | |
| 850 | + "Illegal data address 0x%0X in write_bit\n", | |
| 851 | 851 | address); |
| 852 | 852 | } |
| 853 | 853 | _sleep_response_timeout(ctx); |
| ... | ... | @@ -865,7 +865,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 865 | 865 | } else { |
| 866 | 866 | if (ctx->debug) { |
| 867 | 867 | fprintf(stderr, |
| 868 | - "Illegal data value %0X in write_bit request at address %0X\n", | |
| 868 | + "Illegal data value 0x%0X in write_bit request at address %0X\n", | |
| 869 | 869 | data, address); |
| 870 | 870 | } |
| 871 | 871 | rsp_length = response_exception( |
| ... | ... | @@ -877,7 +877,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 877 | 877 | case MODBUS_FC_WRITE_SINGLE_REGISTER: |
| 878 | 878 | if (address >= mb_mapping->nb_registers) { |
| 879 | 879 | if (ctx->debug) { |
| 880 | - fprintf(stderr, "Illegal data address %0X in write_register\n", | |
| 880 | + fprintf(stderr, "Illegal data address 0x%0X in write_register\n", | |
| 881 | 881 | address); |
| 882 | 882 | } |
| 883 | 883 | _sleep_response_timeout(ctx); |
| ... | ... | @@ -912,7 +912,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 912 | 912 | MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE, rsp); |
| 913 | 913 | } else if ((address + nb) > mb_mapping->nb_bits) { |
| 914 | 914 | if (ctx->debug) { |
| 915 | - fprintf(stderr, "Illegal data address %0X in write_bits\n", | |
| 915 | + fprintf(stderr, "Illegal data address 0x%0X in write_bits\n", | |
| 916 | 916 | address + nb); |
| 917 | 917 | } |
| 918 | 918 | rsp_length = response_exception( |
| ... | ... | @@ -947,7 +947,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 947 | 947 | MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE, rsp); |
| 948 | 948 | } else if ((address + nb) > mb_mapping->nb_registers) { |
| 949 | 949 | if (ctx->debug) { |
| 950 | - fprintf(stderr, "Illegal data address %0X in write_registers\n", | |
| 950 | + fprintf(stderr, "Illegal data address 0x%0X in write_registers\n", | |
| 951 | 951 | address + nb); |
| 952 | 952 | } |
| 953 | 953 | rsp_length = response_exception( |
| ... | ... | @@ -995,7 +995,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 995 | 995 | case MODBUS_FC_MASK_WRITE_REGISTER: |
| 996 | 996 | if (address >= mb_mapping->nb_registers) { |
| 997 | 997 | if (ctx->debug) { |
| 998 | - fprintf(stderr, "Illegal data address %0X in write_register\n", | |
| 998 | + fprintf(stderr, "Illegal data address 0x%0X in write_register\n", | |
| 999 | 999 | address); |
| 1000 | 1000 | } |
| 1001 | 1001 | rsp_length = response_exception( |
| ... | ... | @@ -1036,7 +1036,7 @@ int modbus_reply(modbus_t *ctx, const uint8_t *req, |
| 1036 | 1036 | (address_write + nb_write) > mb_mapping->nb_registers) { |
| 1037 | 1037 | if (ctx->debug) { |
| 1038 | 1038 | fprintf(stderr, |
| 1039 | - "Illegal data read address %0X or write address %0X write_and_read_registers\n", | |
| 1039 | + "Illegal data read address 0x%0X or write address 0x%0X write_and_read_registers\n", | |
| 1040 | 1040 | address + nb, address_write + nb_write); |
| 1041 | 1041 | } |
| 1042 | 1042 | rsp_length = response_exception(ctx, &sft, | ... | ... |